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7425499 Methods for forming interconnects in vias and microelectronic workpieces including such interconnects  
Methods for forming interconnects in blind vias or other types of holes, and microelectronic workpieces having such interconnects. The blind vias can be formed by first removing the bulk of the...
7425491 Nanowire transistor with surrounding gate  
One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous semiconductor material is formed on a...
7425472 Semiconductor fuses and semiconductor devices containing the same  
A fuse for use in a semiconductor device includes spaced-apart terminals with at least two layers of conductive material and a single-layer conductive link joining the spaced-apart terminals and...
7425470 Microelectronic component assemblies employing lead frames having reduced-thickness inner lengths  
The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a...
7425463 Stacked die package for peripheral and center device pad layout device  
An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at...
7425462 Methods relating to the reconstruction of semiconductor wafers for wafer-level processing  
Methods relating to the reconstruction of semiconductor wafers for wafer-level processing are disclosed. Selected semiconductor dice having alignment cavities formed in a surface thereof are placed...
7425461 Photon amplification for image sensors  
A pixel cell having a substrate, photo-conversion device, and at least one dielectric layer over the photo-conversion device. The at least one dielectric layer includes one or more rare earth...
RE40490 Method and apparatus for programmable field emission display  
A method and apparatus for programmable field emission display comprising an array of cathodoluminescent elements. Each cathodoluminescent element in the array is responsive to separate select...
7424635 System and method for power saving delay locked loop control by selectively locking delay interval  
The delay locked loop (“DLL”) delay interval can be locked to stop the DLL from wasting power in unnecessarily switching to synchronize the device with the DLL is associated to the system...
7424634 System and method for reducing jitter of signals coupled through adjacent signal lines  
A method and system for coupling digital signals from a first location to a second location through respective signal lines includes a mode detector that detects each of the transitions of the...
7424629 Data controlled power supply apparatus  
A power supply, and a method of controlling the power supply, in which more or less power capacity of the power supply is activated depending on the state of a digital data signal on a data bus....
7424593 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices  
In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector...
7424581 Host memory interface for a parallel processor  
A memory interface for a parallel processor which has an array of processing elements and can receive a memory address and supply the memory address to a memory connected to the processing...
7424557 System for determining status of multiple interlocking FIFO buffer structures based on the position of at least one pointer of each of the multiple buffers  
One embodiment of the present invention relates to a method for using at least two first-in, first-out (“FIFO”) buffers in a pipelined bus, comprising, interlocking the at least two FIFO...
7424082 Digital lock detector for PLL  
Circuits and methods for detecting a lock condition of a phase-locked loop (PLL) circuit are provided. A frequency divider outputs a clock having a frequency equal to a reference clock frequency...
7423923 Capacitor supported precharging of memory digit lines  
Circuits and methods are provided for precharging pairs of many digit lines. The final precharge voltage of the digit lines is different from the average of the digit line voltages prior to...
7423922 Defective block handling in a flash memory device  
A method and circuit that remaps, to a single redundant memory block, defective rows from amongst a plurality of defective memory blocks. The circuit determines which rows of each memory block is...
7423919 Method and system for improved efficiency of synchronous mirror delays and delay locked loops  
A plurality of improved memory systems employing a phase detection system in conjunction with either a synchronous mirror delay or a delay-locked loop, and related methods of operation, are...
7423918 Memory device having data paths with multiple speeds  
A memory device has multiple bi-directional data paths. One of the multiple bi-directional data paths is configured to transfer data at one speed. Another one of the multiple bi-directional data...
7423676 Asymmetric comparator for use in pixel oversaturation detection  
An imaging circuit using an asymmetric comparator to detect an oversaturated pixel is disclosed. The comparator employs a transistor differential pair which are fabricated to be slightly...
7423476 Current mirror circuit having drain-source voltage clamp  
A circuit and method for providing an output current that includes biasing an output transistor in accordance with a reference current to conduct the output current and further includes maintaining...
7423465 Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit  
A system and method for generating a correction signal for correcting duty cycle error of a first clock signal relative to a second complementary clock signal. Changes to a time difference between...
7423463 Clock capture in clock synchronization circuitry  
Clock capturing synchronization circuitry first generates a synchronized clock signal from a reference clock signal, then captures the synchronized clock signal, and continues to output a...
7423462 Clock capture in clock synchronization circuitry  
Clock capturing synchronization circuitry first generates a synchronized clock signal from a reference clock signal, then captures the synchronized clock signal, and continues to output a...
7423456 Fast response time, low power phase detector circuits, devices and systems incorporating the same, and associated methods  
A circuit for quickly accomplishing highly accurate phase detection using low power is described. The circuit includes a phase decision circuit that receives two clock signals and detects the phase...
7423345 Semiconductor constructions comprising a layer of metal over a substrate  
The invention includes a method of forming a metal-containing film over a surface of a semiconductor substrate. The surface is exposed to a supercritical fluid. The supercritical fluid has H 2 , at...
7423338 Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice  
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board,...
7423336 Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices  
A rerouting element for a semiconductor device that includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations...
7423331 Molded stiffener for thin substrates  
A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is molded to the substrate to provide...
7423311 Atomic layer deposition of Zr3N4/ZrO2 films as gate dielectrics  
The use of atomic layer deposition (ALD) to form a dielectric layer of zirconium nitride (Zr 3 N 4 ) and zirconium oxide (ZrO 2 ) and a method of fabricating such a dielectric layer produces a...
7423249 Layout technique for address signal lines in decoders including stitched blocks  
A decoder block includes a number of generic blocks stitched together. The generic blocks have an address line layout that enables the decoders to be addressed with a reduced number of signal lines.
7422986 Deposition methods utilizing microwave excitation  
The invention includes a deposition apparatus having a reaction chamber, and a microwave source external to the chamber. The microwave source is configured to direct microwave radiation toward the...
7422978 Methods of manufacturing interposers with flexible solder pad elements  
Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes flexible solder pad elements that are...
7422966 Technique for passivation of germanium  
A method of passivating germanium that comprises providing a germanium material and carburizing the germanium material to form a germanium carbide layer. The germanium carbide layer may be formed...
7422960 Method of forming gate arrays on a partial SOI substrate  
The invention includes methods for utilizing partial silicon-on-insulator (SOI) technology in combination with fin field effect transistor (finFET) technology to form transistors particularly...
7422948 Threshold voltage adjustment for long channel transistors  
A threshold voltage adjusted long-channel transistor fabricated according to short-channel transistor processes is described. The threshold-adjusted transistor includes a substrate with...
7422927 Methods of forming a resistance variable element  
The invention includes methods of depositing silver onto a metal selenide-comprising surface, and methods of forming a resistance variable device. In one implementation, a method of depositing...
7422924 Image device and photodiode structure  
The invention provides a photodiode with an increased charge collection area, laterally spaced from an adjacent isolation region. Dopant ions of a first conductivity type with a first impurity...
7422639 Method of reducing water spotting and oxide growth on a semiconductor structure  
The present invention relates to a method of cleaning and drying a semiconductor structure in a modified conventional gas etch/rinse or dryer vessel.
7422635 Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces  
The present disclosure suggests several systems and methods for batch processing of microfeature workpieces, e.g., semiconductor wafers or the like. One exemplary implementation provides a method...
7421630 Apparatus and methods for testing memory devices  
Each match line of a memory device such as a content addressable memory (CAM) device and a related part of a priority encoder can be separately tested. In test mode, all match lines are first...
7421607 Method and apparatus for providing symmetrical output data for a double data rate DRAM  
An apparatus and method is disclosed to compensate for skew and asymmetry of a locally processed system clock used to synchronize an output signal, e.g., a data signal or a timing signal, from a...
7421606 DLL phase detection using advanced phase equalization  
A system and method are disclosed to generate and terminate clock shift modes during initialization of a synchronous circuit (e.g., a delay-locked loop or DLL). Upon initialization, the DLL is...
7421121 Spectral normalization using illuminant exposure estimation  
After image capture, scene parameters are analyzed, e.g. lux, flicker, or world estimation. A best guess illuminant for the scene parameters is determined. At this point, the white balancing...
7420849 Memory device distributed controller system  
A memory device distributed controller circuit distributes memory control functions amongst a plurality of memory controllers. A master controller receives an interpreted command and activates the...
7420361 Method for improving stability and lock time for synchronous circuits  
Delay-locked loops, signal locking methods and devices and systems incorporating delay-locked loops are described. A delay-locked loop includes a forward delay path, a feedback delay path, a phase...
7420240 Method to remove an oxide seam along gate stack edge, when nitride space formation begins with an oxide liner surrounding gate stack  
An exposed top end of a vertical oxide spacer is removed, and a nitride layer is deposited in an amount sufficient to replace the removed portion prior to exposing a memory device to a self align...
7420239 Dielectric layer forming method and devices formed therewith  
Embodiments in accordance with the present invention provide alternative materials, and methods of forming such materials, that are effective as dielectric layers. Such embodiments include forming...
7420238 Semiconductor constructions  
The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage...
7420233 Photodiode for improved transfer gate leakage  
An image sensing circuit and method is disclosed, wherein a photodiode is formed in a substrate through a series of angled implants. The photodiode is formed by a first, second and third implant,...
Matches 251 - 300 out of 17621 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >