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7418526 Memory hub and method for providing memory sequencing hints  
A memory module includes a memory hub coupled to several memory devices. The memory hub is also coupled to receive a memory packet from a system controller containing a memory hint indicative of...
7418161 Photonic crystal-based optical elements for integrated circuits and methods therefor  
Exemplary embodiments of the invention provide photonic crystal-based optical elements for integrated circuits. A photonic crystal optical device comprises a substrate and a plurality of pillars...
7418071 Method and apparatus for generating a phase dependent control signal  
A phase detector generates a phase dependent control signal according to the phase relationship between a first and second clock signal. The phase detector includes first and second phase detector...
7417916 Methods of reducing coupling noise between wordlines  
Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by...
7417901 Memory device having terminals for transferring multiple types of data  
A memory device includes a number of terminals for transferring input data and output data to and from a memory array. The memory device includes an auxiliary circuit for receiving input auxiliary...
7417894 Single latch data circuit in a multiple level cell non-volatile memory device  
A single latch circuit is coupled to each bit line in a multiple level cell memory device to handle reading multiple data bits. The circuit is comprised of a latch having an inverted node and a...
7417893 Integrated DRAM-NVRAM multi-level memory  
An integrated DRAM-NVRAM, multi-level memory cell is comprised of a vertical DRAM device with a shared vertical gate floating plate device. The floating plate device provides enhanced charge...
7417677 Lag cancellation in CMOS image sensors  
A pixel cell with improved lag characteristics without increased noise. The pixel cell according to embodiments of the invention includes a photo-conversion device and a floating diffusion region...
7417674 Multi-magnification color image sensor  
A color image sensor has imaging elements each structured to form, at an image plane, an image of a subject having a respective magnification. Ones of the imaging elements forming respective ones...
7417505 CMOS amplifiers with frequency compensating capacitors  
The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the...
7417478 Delay line circuit  
Methods, circuits, devices, and systems are provided, including a delay line for a delay-locked loop. One method includes providing a reference clock to a first delay unit in a delay line. The...
7417325 Semiconductor component having thinned die with conductive vias configured as conductive pin terminal contacts  
A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit...
7417305 Electronic devices at the wafer level having front side and edge protection material and systems including the devices  
Methods for applying a dielectric protective layer to a wafer in wafer-level chip scale package manufacture are disclosed. A flowable dielectric protective material with fluxing capability is...
7417294 Microelectronic imaging units and methods of manufacturing microelectronic imaging units  
Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies...
7417280 Method and apparatus for a flash memory device comprising a source local interconnect  
A method for forming a flash memory device having a local interconnect connecting source regions of a plurality of transistors within a sector allows for a highly selective wet etch of a dielectric...
7417272 Image sensor with improved dynamic range and method of formation  
Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one...
7416994 Atomic layer deposition systems and methods including metal beta-diketiminate compounds  
The present invention provides atomic layer deposition systems and methods that include metal compounds with at least one β-diketiminate ligand. Such systems and methods can be useful for...
7416958 Epitaxial semiconductor layer and method  
A method for epitaxially forming a first semiconductor structure attached to a second semiconductor structure is provided. Devices and methods described include advantages such as reduced lattice...
7416943 Peripheral gate stacks and recessed array gates  
Methods are provided for simultaneously processing transistors in two different regions of an integrated circuit. Planar transistors are provided in a logic region while recessed access devices...
7416933 Methods of enabling polysilicon gate electrodes for high-k gate dielectrics  
Complementary transistors and methods of forming the complementary transistors on a semiconductor assembly are described. The transistors are formed with an optional interfacial oxide, such as SiO...
7416913 Methods of manufacturing microelectronic imaging units with discrete standoffs  
Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies...
7416472 Systems for planarizing workpieces, e.g., microelectronic workpieces  
This disclosure provides methods and apparatus for predictably changing the thickness of a microfeature workpiece. One implementation provides a planarizing method in which a first workpiece is...
7416107 Concave face wire bond capillary and method  
An improved wire bonding capillary used in the bonding of wires to the bond pads of a semiconductor device and the leads of a lead frame, the wire bonding capillary having a working tip having a...
7415567 Memory hub bypass circuit and method  
A computer system and a method used to access data from a plurality of memory devices with a memory hub. The computer system includes a plurality of memory modules coupled to a memory hub...
7415404 Method and apparatus for generating a sequence of clock signals  
A clock generator circuit generates a sequence of clock signals equally phased from each other from a master clock signal. The clock generator is formed by inner and outer delay-locked loops. The...
7415317 Method and system for correlating and combining production and non-production data for analysis  
This document discusses, among other things, a method and system for correlating and combining production and non-production data for analysis for the purposes of increasing manufacturing...
7414895 NAND flash memory cell programming  
A flash memory device, such as a NAND flash, having an array of floating gate transistor memory cells arranged in a first and second addressable blocks. A voltage source to supply programming...
7414662 Multifunction lens  
An image capture apparatus having a multifunction lens and a method for capturing an image are disclosed. The multifunction lens has an imaging lens portion adapted to focus a scene onto an image...
7414661 CMOS image sensor using gradient index chip scale lenses  
A camera module includes a gradient index lens on a spacer plate attached over an array of pixel sensors and associated micro lenses. The spacer plate and gradient index lens can be formed at the...
7414653 Dark reduction via feedback control of photodiode bias  
An active pixel sensor comprises a photodiode providing a photodiode output current indicative of an intensity of light incident the photodiode and an integrator circuit electrically coupled to the...
7414444 Clock capture in clock synchronization circuitry  
Clock capturing synchronization circuitry first generates a synchronized clock signal from a reference clock signal, then captures the synchronized clock signal, and continues to output a...
7414299 Semiconductor package assembly and method for electrically isolating modules  
A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for...
7414297 Capacitor constructions  
The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps...
7414260 Vertical tunneling transistor  
The disclosed embodiments relate to a vertical tunneling transistor that may include a channel disposed on a substrate. A quantum dot may be disposed so that an axis through the channel and the...
7413981 Pitch doubled circuit layout  
In one embodiment of the present invention, a method for connecting a plurality of bit lines to sense circuitry includes providing a plurality of bit lines extending from a memory array in a first...
7413979 Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices  
Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one...
7413962 Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus  
A method for forming a semiconductor device comprises forming a layer to be etched, then forming a hard mask layer over the layer to be etched. The hard mask is etched to form an opening defined by...
7413952 Methods of forming a plurality of circuit components and methods of forming a plurality of structures suspended elevationally above a substrate  
A plurality of capacitor electrode openings is formed within capacitor electrode-forming material. A first set of the openings is formed to a depth which is greater within the capacitor...
7413948 Semiconductor capacitor structure and method to form same  
A semiconductor capacitor structure comprising sidewalls of conductive hemispherical grained material, a base of metal silicide material, and a metal nitride material overlying the conductive...
7413946 Formation of standard voltage threshold and low voltage threshold MOSFET devices  
Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked,...
7413928 Die-wafer package and method of fabricating same  
A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each...
7413500 Methods for planarizing workpieces, e.g., microelectronic workpieces  
This disclosure provides methods and apparatus for predictably changing the thickness of a microfeature workpiece. One implementation provides a planarizing method in which a first workpiece is...
7413480 Silicon pillars for vertical transistors  
In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide...
7413342 DRAM temperature measurement system  
A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the...
7412634 On-chip sampling circuit and method  
Through addressing circuitry, a sampling circuit can choose a unique internal node/signal on an encapsulated/packaged chip to be output to one or more drivers. The chosen signals available at the...
7412574 System and method for arbitration of memory responses in a hub-based memory system  
A memory hub module includes a decoder that receives memory requests determines a memory request identifier associated with each memory request. A packet memory receives memory request identifiers...
7412571 Memory arbitration system and method having an arbitration packet protocol  
A memory hub and method for transmitting a read response on a data path of a memory hub interposed between a transmitting memory hub and a receiving memory hub. An arbitration packet including data...
7412566 Memory hub and access method having internal prefetch buffers  
A memory module includes a memory hub coupled to several memory devices. The memory hub includes history logic that predicts on the basis of read memory requests which addresses in the memory...
7411857 Power savings in active standby mode  
Apparatus for reducing the power consumed by a memory device selectively activates a power saving mode in which operation of a delay compensation circuit may be suspended during an active power...
7411848 Independent polling for multi-page programming  
A method of testing, polling and trimming memory pages in different memory banks simultaneously is presented, using a cache memory located in each one of the memory banks. The cache memory is at...
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