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7616027 Configurable circuits, IC's and systems  
Some embodiments of the invention provide a configurable integrated circuit (IC). The configurable IC includes first and second interconnect circuits. The first interconnect circuit has a set of...
7616024 Resilient integrated circuit architecture  
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of...
7612582 Programmable logic controller and related electronic devices  
A programmable device is useful for high speed operation or as a process controller or as a component for implementing PLD or FPGA applications. The programmable device includes programmable logic...
7612581 Apparatus for dynamic deployment of pin functions on a chip  
An apparatus for dynamic deployment of pin functions on a chip is disclosed in the present invention. The apparatus comprises: an input pin receiving unit, capable of integrating a plurality of...
7609089 FPGA architecture at conventional and submicron scales  
Reconfigurable logic devices and methods of programming the devices are disclosed. The logic device includes a look-up table (LUT) and at least one storage element configured for sampling LUT...
7609088 Programmable logic array  
A programmable logic array (PLA) which may include an AND-plane receiving first input signals and generating logic product signals based on the first input signals, and an OR-plane receiving the...
7609086 Crossbar control circuit  
A control circuit includes a crossbar array having input columns and output rows configured to store first stored data in the form of high or low resistance states. The input columns are connected...
7609085 Configurable integrated circuit with a 4-to-1 multiplexer  
Some embodiments provide a configurable integrated circuit with a tile. The tile has a first input multiplexer (IMUX), a second IMUX, and a look up table (LUT). The first IMUX is configured as a...
7605606 Area efficient routing architectures for programmable logic devices  
Systems and methods provide programmable logic block architectures and routing architectures for the programmable logic blocks. For example, in accordance with an embodiment of the present...
7605605 Programmable logic cells with local connections  
A programmable logic structure is disclosed employing input logic routing cell (ILRC) multiplexers and output logic routing cell (OLRC) multiplexers for making local connections between dedicated...
7605604 Integrated circuits with novel handshake logic  
Integrated circuits (ICs) having novel handshake logic are provided. An IC includes a ready multiplexer, an acknowledge demultiplexer, a C-element coupled to the ready multiplexer and the...
7605603 User-accessible freeze-logic for dynamic power reduction and associated methods  
A programmable logic device (PLD) includes a configuration circuit, and first and second freeze-logic circuits. The configuration circuit provides configuration data for configuring programmable...
7603599 Method to test routed networks  
Testing of routing resources in a path between network nodes is provided using simpler nodes to replace more complex IP modules which could be programmed into an FPGA after the routing resources...
7602213 Using programmable latch to implement logic  
A logic circuit is disclosed that includes a latch for enhancing the circuit logic capacity. The circuit includes a logic block comprising a plurality of logic inputs and at least one logic output,...
7598766 Customized silicon chips produced using dynamically configurable polymorphic network  
A fabrication technique called “component and polymorphic network,” in which semiconductor chips are made from small prefabricated bare electronic component dies, e.g., application specific...
7596774 Hard macro with configurable side input/output terminals, for a subsystem  
A hard macro device (HMD), for a subsystem (TMi) such as a data processor, comprises a processing core (C) provided with at least one time critical input terminal (CIT) adapted to feed it with time...
7595659 Logic cell array and bus system  
A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for...
7595655 Retrieving data from a configurable IC  
Some embodiments provide a configurable integrated circuit (IC). The IC has configurable logic circuits for performing logical operations, configurable routing circuits for routing signals between...
7592835 Co-processor having configurable logic blocks  
A co-processor system is provided that includes an array of configurable logic blocks (CLBs). Each CLB including a plurality of look-up tables and a plurality of adders. Each CLB may be dynamically...
7592834 Logic block control architectures for programmable logic devices  
In one embodiment of the invention, a programmable logic device comprises configuration memory adapted to store configuration data and a plurality of programmable logic blocks. At least one...
7592833 Systems and methods involving field programmable gate arrays  
A method for programming logic in a field programmable gate array (FPGA) comprising, receiving a logic process including a logic node, and associating the node with a logic descriptor, and saving...
7589651 Flexible signal detect for programmable logic device serial interface  
A serial interface for a programmable logic device (PLD) uses an analog-to-digital converter (ADC) in place of conventional signal detect and receiver detect circuitry. A separate ADC can be used...
7589558 Method and apparatus for configuring an integrated circuit  
A configuration management system is disclosed. For example, an embodiment of the present invention provides a configuration management system comprising at least one configuration storage device...
7589557 Reversible input/output delay line for bidirectional input/output blocks  
An input/output (I/O) structure includes a delay element usable for the input path, the output path, or both input and output paths in a user design. In a first mode, the delay element is included...
7587698 Operational time extension  
Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The...
7586430 Integrated circuit comprising a mixed signal single-wire interface and method for operating the same  
The invention relates to an integrated circuit ( 1 ) which comprises a novel bidirectional mixed signal single-wire interface ( 6 ) via which the circuit receives command information from a host...
7586327 Distributed memory circuitry on structured application-specific integrated circuit devices  
A logic module for a structured ASIC is mask-programmable to perform any of a plurality of logic functions or to alternatively function as two static random access memory (“SRAM”) cells. Most...
7584447 PLD architecture for flexible placement of IP function blocks  
In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function...
7579869 Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks  
A repeatable non-uniform segmented routing architecture in a field programmable gate array comprising: a repeatable block of routing tracks, the routing tracks grouped into sets of routing tracks,...
7579868 Architecture for routing resources in a field programmable gate array  
A turning structure for routing channels in a field programmable gate array, comprising a first plurality of routing channels having a first direction and a second plurality of routing channels...
7579867 Restructuring data from a trace buffer of a configurable IC  
Some embodiments provide a method that outputs from a configurable IC a first set of data bits from a trace buffer. Each bit of the first set of data bits is simultaneously generated in the...
7579866 Programmable logic device with configurable override of region-wide signals  
A programmable logic device architecture providing efficient configurable functionality to allow the “tie-off” of logic region-wide control signals. This functionality is provided while...
7579864 Logic block control system and logic block control method  
The number of blocks that can be stopped when performing target processing in a programmable logic unit is obtained, and a stop rate of each of a plurality of logic blocks included in the...
7579863 Circuit and method for reducing pin count of chip  
A configured setting circuit and method thereof is disclosed. The configured setting circuit includes a multi-phase clock generator, a plurality of terminals, and a decision circuit. The...
7576565 Crossbar waveform driver circuit  
A driving waveform circuit includes a crossbar array having input columns and output rows wherein the crossbar array is configured to store data in the form of high or low resistance states, delay...
7576564 Configurable IC with routing circuits with offset connections  
Some embodiments provide a configurable integrated circuit (“IC”) that includes several configurable tiles arranged in a tile arrangement. Each configurable tile has a set of configurable logic...
7576563 High fan-out signal routing systems and methods  
Systems and methods are disclosed herein to provide high fan-out signal routing. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a...
7573297 Flexible macrocell interconnect  
Methods and apparatus for novel routing structures and methods that improve fitting of user-defined functions onto programmable logic devices. In particular, second time fitting is improved....
7573296 Configurable IC with configurable routing resources that have asymmetric input and/or outputs  
Some embodiments provide a configurable IC that includes several configurable tiles. The configurable tiles include several interior tiles within the interior of an arrangement of configurable...
7573294 Programmable logic based latches and shift registers  
Disclosed is a programmable logic device adapted to implement a shift register, the device comprising: a logic block comprised of: a latch having an input; and a logic element having an output...
7573291 Programmable logic device with enhanced logic block architecture  
A programmable logic block within a programmable logic device includes at least two interconnected slices, each of the interconnect slices including at least two interconnected lookup tables. Each...
7571395 Generation of a circuit design from a command language specification of blocks in matrix form  
Generation of a circuit design using a command language. The various approaches include generating in a memory arrangement respective instances of design blocks in response to user-entered commands...
7570079 Level-restoring buffers for programmable interconnect circuits and method for building the same  
A technique that unfolds the nMOS-tree multiplexer to improve the propagation delay and/or active power consumption is provided. The main idea is to replicate the nMOS element of the downstream...
7570077 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements  
Some embodiments provide a circuit for accessing stored data in a configurable IC that includes several configurable circuits. The IC also includes several storage circuits. Each storage circuit...
7568177 System and method for power gating of an integrated circuit  
Apparatus and method aspects for power gating of an integrated circuit (IC) include providing at least one I/O power pad of an IC with a switch arrangement. The at least one I/O power pad is...
7564262 Crossbar comparator  
A device includes a first crossbar array having first input columns and first output rows, wherein a plurality of the rows of the first crossbar array are configured to store first stored data in...
7564261 Embedding memory between tile arrangement of a configurable IC  
Some embodiments of the invention provide a configurable IC that includes several configurable computational tiles and several memory tiles. These tiles are arranged in a particular tile...
7564260 VPA interconnect circuit  
Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes an interconnect circuit having a first set of input terminals and a set of output terminals. The...
7560954 Programmable system on a chip for temperature monitoring and control  
A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and temperature sensing and control analog and digital...
7557613 Scalable non-blocking switching network for programmable logic  
A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors...
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