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7603503 |
Efficiency based arbiter
An arbiter decides to grant access from multiple clients to a shared resource (e.g. memory) using efficiency and/or urgency terms. Urgency for a client may be determined based on an “in-band”...
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7596647 |
Urgency based arbiter
An arbiter decides to grant access from multiple clients to a shared resource (e.g. memory) using efficiency and/or urgency terms. Urgency for a client may be determined based on an “in-band”...
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7590788 |
Controlling transmission on an asynchronous bus
In one embodiment, the present invention includes a bus controller including a mutual exclusion unit to receive a data transmission request from first and second agents and to select one of the...
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7587543 |
Apparatus, method and computer program product for dynamic arbitration control
A dynamic arbitration controller includes components for reading current state information as well as records of known arbitration states which may cause a deadlock condition, comparing the current...
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7558896 |
Data transfer control device arbitrating data transfer among a plurality of bus masters
According to an aspect of the invention, there is provided a data transfer control device that carries out data transfer in a data transfer system, in which plural bus masters are connected to a...
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7555585 |
Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application
A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency....
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7546405 |
Methods and apparatus for dynamic grouping of requestors of resources in a multi-processor system
Methods and apparatus provide for: assigning each of a plurality of requesters to a respective one of a plurality of requester groups; receiving tokens from a plurality of resources, where each...
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7543093 |
Method and system for stream burst data transfer
The method and system for data transfer between the master device and the slave device through the bus are presented. It includes arbitrating the requests of bus usage from the master device; the...
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7539805 |
Bus arbitration method and computer-readable medium
A bus arbitration method for arbitrating a bus in a computer capable of executing a plurality of tasks by a plurality of devices connected to the bus is provided and includes: acquiring a task...
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7523110 |
High availability designated winner data replication
Collisions are resolved in a database replication system. The system includes a plurality of nodes arranged in either a master-slave or network configuration. Each node includes a database, wherein...
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7506090 |
System and method for user-configurable resource arbitration in a process control system
A system includes at least one memory and at least one processor. The at least one memory is operable to store a resource object associated with a resource. The at least one memory is also operable...
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7500035 |
Livelock resolution method
A mechanism is provided for resolving livelock conditions in a multiple processor data processing system. When a bus unit detects a timeout condition, or potential timeout condition, the bus unit...
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7472213 |
Resource management device
Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority...
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7433984 |
Time-based weighted round robin arbiter
A PCI bus time-based weighted round robin arbiter has a phase table divided into a plurality of phases. Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine...
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7395360 |
Programmable chip bus arbitration logic
Methods and apparatus are provided for implementing a bus arbitration priority encoding scheme with fairness. Bus arbitration logic is connected to multiple primary components or devices. The...
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7391766 |
Packet unstopper system for a parallel packet switch
A system for controlling egress buffer saturation includes, for each data packet flow, a comparator for comparing the number of data packets ‘WPC’ temporarily stored within an egress buffer to...
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7389373 |
Asynchronous arbitration device and microcontroller comprising such an arbitration device
An arbitration device is provided, which is designed to be connected between, on the one hand, a first and a second module and, on the other hand, storing means forming a memory workspace. This...
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7386645 |
System on a chip with an arbitration unit to grant right of access to a common resource in response to conflicting requests for access from initiator modules, and storage key incorporating the arbitration unit
An electronic system comprises a defined number N of functional modules, including a defined number P of initiator modules and a defined number Q of target modules, where N, P and Q are integer...
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7383395 |
Storage device
A storage system is disclosed for performing control to match data among cache memories corresponding to shared volumes when multiple disk controllers containing cache memories are accessing shared...
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7383370 |
Arbiter circuit and signal arbitration method
An arbiter circuit ( 100 ) can include a latch circuit ( 102 ) that latches competing input signals (MATCH 1 and MATCH 2 ) to generate signals on latch output ( 110 - 0 and 110 - 1 ). A filter...
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7380247 |
System for delaying priority boost in a priority offset amount only after detecting of preemption event during access to critical section
A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system...
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7380037 |
Data transmitter between external device and working memory
A data transmitter includes a bus master circuit. The bus master circuit obtains the right to use a CPU bus and directly performs data transmission to and from a working memory connected to the CPU...
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7350003 |
Method, system, and apparatus for an adaptive weighted arbiter
An adaptive weighted arbitration algorithm that is user configurable is discussed. The arbitration logic and algorithm considers past arbitration history events and is dynamic to allow for losing...
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7328292 |
Arbitration method and device
In an arbitration device, the entire transfer efficiency is improved without increasing the operating frequency and the number of pins. An overflow monitor mechanism generates an alarm once...
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7328291 |
System and method for controlling the service engagement in a data bus system
Data bus system and method are provided for controlling service engagements for bus users. At least one bus user provides services and other bus users use these services. A resource manager stores...
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7325125 |
Computer system for accessing initialization data and method therefor
A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the...
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7315909 |
Hierarchized arbitration method
An arbitration method, for a data bus in an architecture having n functional blocks, regulates access to the bus. The method includes: receiving, at one of plural agents, information from one of...
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7302686 |
Task management system
A task management system that inherit priority and that can reduce the queue operation required for transition to/return from a mutual exclusion awaiting state The task management system can...
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7296105 |
Method and apparatus for configuring an interconnect to implement arbitration
Various methods and apparatuses are described in which an interconnect couples to a plurality of initiator network resources and a plurality of target network resources. The interconnect may...
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7287111 |
Method and system for creating and dynamically selecting an arbiter design in a data processing system
A method, system and computer program product for creating and dynamically selecting an arbiter design within a data processing system on the basis of command history is disclosed. The method...
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7281071 |
Method for designing an initiator in an integrated circuit
A method for designing an integrated circuit where the integrated circuit includes a plurality of modules and where each module includes an initiator port and a target port coupled to a distributed...
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7275121 |
System and method for hardware assisted resource sharing
A system and method for managing access to a shared resource employs mutually exclusive flags. The flags enable arbitration between all applications requesting the use of the shared resource and...
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7263566 |
Method and apparatus of reducing transfer latency in an SOC interconnect
Embodiments of the invention are directed to a method and apparatus for reducing transfer latency in a system on a chip, the system on a chip comprising a bus master, a bus slave and an arbiter,...
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7251702 |
Network controller and method of controlling transmitting and receiving buffers of the same
In a method of controlling transmitting and receiving buffers of a network controller and a network controller operating under such a method, at least one request for access to a system bus from...
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7249210 |
Bus access arbitration scheme
A bus arbitration scheme in a processing system. The processing system includes a bus, a plurality of processors coupled to the bus, and a bus arbiter. The bus arbiter may assign a first tier...
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7246188 |
Flow control method to improve bus utilization in a system-on-a-chip integrated circuit
A system-on-chip (SoC) integrated circuit (IC) has reduced bus contention and improved bus utilization. The SoC IC includes a bus controller. Masters interconnected with the bus controller issue...
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7237071 |
Embedded symmetric multiprocessor system with arbitration control of access to shared resources
A single chip, embedded symmetric multiprocessor (ESMP) having parallel multiprocessing architecture composed of identical processors includes a single program memory. Program access arbitration...
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7234012 |
Peripheral component interconnect arbiter implementation with dynamic priority scheme
A dynamic priority scheme is provided that uses information including the status of the target and data availability in deciding which PCI master should be assigned ownership of the bus. The target...
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7231477 |
Bus controller
A bus controller is provided including a processing means for performing processings of levels having cycle numbers which are different dependent on requesters which respectively issue an access...
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7228368 |
Polling-based apparatus and system guaranteeing quality of service
A polling-based communication apparatus and system. The apparatus of the invention, connected to a host computer through a peripheral bus, comprises an arbiter and multiple addressable entities....
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7225283 |
Asynchronous arbiter with bounded resolution time and predictable output state
An arbiter circuit ( 100 ) can include a latch ( 106 ) that latches competing input signals (Req_A and Req_B) to generate latch output signals (latn 1 and latn 2 ). A filter section ( 108 ) can...
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7213084 |
System and method for allocating memory allocation bandwidth by assigning fixed priority of access to DMA machines and programmable priority to processing unit
In a first aspect, a first method is provided for allocating memory bandwidth. The first method includes the steps of (1) assigning a fixed priority of access to the memory bandwidth to one or more...
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7188262 |
Bus arbitration in low power system
Power is conserved in a data processing system that includes a processor core and system circuitry coupled to the processor core. A first method for conserving power includes entering a low power...
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7177966 |
Microcomputer minimizing influence of bus contention
An edge detecting circuit detects an input level change (edge) of a synchronous signal provided from a synchronous signal input terminal. A data latch unit latches digital data provided from an...
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7146444 |
Method and apparatus for prioritizing a high priority client
A method and apparatus of deprioritizing a high priority client. An isochronous data stream request is generally referred to as a “high priority” client. These high priority requests are...
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7143224 |
Smart card for performing advance operations to enhance performance and related system, integrated circuit, and methods
An integrated circuit for a smart card may include a transceiver and a controller for cooperating with the transceiver to receive operating requests from a host device. The controller may perform...
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7127539 |
Statistic method for arbitration
A statistic method for arbitration is provided, implementing in an arbitration system comprising a bus, a main controller connected to the bus, and a plurality of peripheral devices able to be...
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7124224 |
Method and apparatus for shared resource management in a multiprocessing system
In a multiprocessor, access to shared resources is provided by a semaphore control mechanism, herein disclosed. The semaphore control mechanism provides for a high degree of programmable firmware...
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7120714 |
High-speed starvation-free arbiter system, rotating-priority arbiter, and two stage arbitration method
A two-stage arbiter system comprises a first-stage arbiter to grant a request to one of a plurality of requestors in accordance with a first arbitration scheme and a second-stage arbiter to grant...
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7117281 |
Circuit, system, and method for data transfer control for enhancing data bus utilization
In a system having a plurality of bus masters, system and method for enhancing data bus utilization are disclosed. This system comprises: a data bus connected to a peripheral apparatus and composed...
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