freepatentsonline.com 141 131 http://www.freepatentsonline.com/index.html http://www.freepatentsonline.com/images/logo.gif freepatentsonline.com: Electrical computers and digital data processing systems: input/output http://www.freepatentsonline.com/result.html?query_txt=ccl/710%20and%20isd/11/05/2009&usapp=on USPTO Class 710 Electrical computers and digital data processing systems: input/output en-us Tue, 10 Nov 2009 08:53:39 EST <![CDATA[Access for host stacks]]> http://www.freepatentsonline.com/y2009/0276549.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[Native and Non-Native I/O Virtualization in a Single Adapter]]> http://www.freepatentsonline.com/y2009/0276551.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[LANE MERGING]]> http://www.freepatentsonline.com/y2009/0276558.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[Mapping a Virtual Address to PCI Bus Address]]> http://www.freepatentsonline.com/y2009/0276544.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[TECHNIQUES FOR DETECTION AND SERIAL COMMUNICATION FOR A NON-USB SERIAL INTERFACE OVER USB CONNECTOR]]> http://www.freepatentsonline.com/y2009/0276546.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[System and method for simplified data transfer]]> http://www.freepatentsonline.com/y2009/0276547.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[DYNAMICALLY SETTING BURST TYPE OF A DOUBLE DATA RATE MEMORY DEVICE]]> http://www.freepatentsonline.com/y2009/0276548.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[SERIAL LINK BUFFER FILL-LEVEL COMPENSATION USING MULTI-PURPOSE START OF PROTOCOL DATA UNIT TIMING CHARACTERS]]> http://www.freepatentsonline.com/y2009/0276550.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[MOTHERBOARD AND POWER MANAGING METHOD FOR GRAPHIC CARD INSTALLED THEREON]]> http://www.freepatentsonline.com/y2009/0276552.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[COMPUTER SYSTEM AND DATA-TRANSMISSION CONTROL METHOD]]> http://www.freepatentsonline.com/y2009/0276554.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[Hot Plug Control Apparatus and Method]]> http://www.freepatentsonline.com/y2009/0276555.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[BUS SYSTEM FOR USE WITH INFORMATION PROCESSING APPARATUS]]> http://www.freepatentsonline.com/y2009/0276557.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[APPARATUS AND METHOD FOR CREATING CONFIGURATIONS OF OFFLINE FIELD DEVICES IN A PROCESS CONTROL SYSTEM]]> http://www.freepatentsonline.com/y2009/0276486.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[METHOD AND APPARATUS FOR DEVICE DRIVER STATE STORAGE DURING DIAGNOSTIC PHASE]]> http://www.freepatentsonline.com/y2009/0276793.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[CONTROLLER, HARD DISK DRIVE AND CONTROL METHOD]]> http://www.freepatentsonline.com/y2009/0276553.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[MIXED-SIGNAL SINGLE-CHIP INTEGRATED SYSTEM ELECTRONICS FOR DATA STORAGE DEVICES]]> http://www.freepatentsonline.com/y2009/0274017.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[MEMORY MODULE WITH CONFIGURABLE INPUT/OUTPUT PORTS]]> http://www.freepatentsonline.com/y2009/0276545.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[CACHE COHERENCY PROTOCOL IN A DATA PROCESSING SYSTEM]]> http://www.freepatentsonline.com/y2009/0276579.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[MEMORY CONTROLLER AND METHOD FOR WRITING A DATA PACKET TO OR READING A DATA PACKET FROM A MEMORY]]> http://www.freepatentsonline.com/y2009/0276556.html Thu, 05 Nov 2009 08:00:00 EST <![CDATA[Media/data card]]> http://www.freepatentsonline.com/y2009/0276434.html Thu, 05 Nov 2009 08:00:00 EST