freepatentsonline.com 141 131 http://www.freepatentsonline.com/index.html http://www.freepatentsonline.com/images/logo.gif freepatentsonline.com: Electrical computers and digital data processing systems: input/output http://www.freepatentsonline.com/result.html?query_txt=ccl/710%20and%20isd/11/10/2009&uspat=on USPTO Class 710 Electrical computers and digital data processing systems: input/output en-us Thu, 12 Nov 2009 03:32:06 EST <![CDATA[System having insertable and removable storage and a control method thereof]]> http://www.freepatentsonline.com/7617335.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Blade computing system]]> http://www.freepatentsonline.com/7617336.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Memory with combined line and word access]]> http://www.freepatentsonline.com/7617338.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[I/O adapter LPAR isolation with assigned memory space]]> http://www.freepatentsonline.com/7617340.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Data transfer control device and electronic instrument]]> http://www.freepatentsonline.com/7617347.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Methods and apparatus for controlling access to resources in an information processing system]]> http://www.freepatentsonline.com/7617344.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Bus interface controller for cost-effective high performance graphics system with two or more graphics processing units]]> http://www.freepatentsonline.com/7617348.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[System and method of double address detection]]> http://www.freepatentsonline.com/7617331.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Fibre channel controller shareable by a plurality of operating system domains within a load-store architecture]]> http://www.freepatentsonline.com/7617333.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Prioritization of interrupts in a storage controller based on interrupt control directives received from hosts]]> http://www.freepatentsonline.com/7617345.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Rapid input/output doorbell coalescing to minimize CPU utilization and reduce system interrupt latency]]> http://www.freepatentsonline.com/7617346.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Method and system for switching a DVI display host]]> http://www.freepatentsonline.com/7617341.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Method and apparatus for implementing packet command instructions for network processing]]> http://www.freepatentsonline.com/7617332.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Serial interface circuit for data transfer]]> http://www.freepatentsonline.com/7617339.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Scalable bus structure]]> http://www.freepatentsonline.com/7617343.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Initiating and using information used for a host, control unit, and logical device connections]]> http://www.freepatentsonline.com/7617349.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Event notifying method, event notifying device and processor system permitting inconsistent state of a counter managing number of non-notified events]]> http://www.freepatentsonline.com/7617389.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Method for reading input/output port data]]> http://www.freepatentsonline.com/7617417.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Data processing system, data processing method and program]]> http://www.freepatentsonline.com/7617334.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Scheduling thread upon ready signal set when port transfers data on trigger time activation]]> http://www.freepatentsonline.com/7617386.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Data transmission system having distributed control functionality]]> http://www.freepatentsonline.com/7616339.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[System and method for supporting TCP out-of-order receive data using generic buffer]]> http://www.freepatentsonline.com/7617291.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Carrier having daisy chained memory chips]]> http://www.freepatentsonline.com/7617350.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Circuits and associated methods for improved debug and test of an application integrated circuit]]> http://www.freepatentsonline.com/7617428.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Smart cards and smart card systems supporting multiple interfaces]]> http://www.freepatentsonline.com/7614566.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[System and method for preloading a bus controller with command schedule]]> http://www.freepatentsonline.com/7617330.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Connector locking latch with signal providing early warning of disconnection]]> http://www.freepatentsonline.com/7614893.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[System-on-a-chip integrated circuit including dual-function analog and digital inputs]]> http://www.freepatentsonline.com/7616026.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[VoIP quality tradeoff system]]> http://www.freepatentsonline.com/7617337.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Universal serial bus dongle device with wireless telephony transceiver and system for use therewith]]> http://www.freepatentsonline.com/7617342.html Tue, 10 Nov 2009 08:00:00 EST <![CDATA[Protocol-independent support of remote DMA]]> http://www.freepatentsonline.com/7617290.html Tue, 10 Nov 2009 08:00:00 EST